Development of non-volatile memory devices having memory cells three-dimensionally integrated has been in progress. For example, there exists a non-volatile memory device in which a plurality of word lines is stacked on a foundation layer, and memory cells are respectively disposed at the positions where a channel body extending through the word lines and each of the word lines intersect with each other. In such a non-volatile memory device, the layers of the word lines are thinned due to miniaturization of the memory cells, and the electrical resistance of the word line lowers the operation speed of the memory cells in some cases. Therefore, the technology for decreasing the electrical resistance of the word line has been needed.